target-arm: Fix BASEPRI, BASEPRI_MAX, and FAULTMASK access
authorSebastian Huber <sebastian.huber@embedded-brains.de>
Sun, 29 May 2011 02:58:41 +0000 (02:58 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Wed, 22 Jun 2011 15:02:42 +0000 (15:02 +0000)
commit2872fd186d6c5d61826d153bf1199cdf00c9cf49
tree6331e9c498b6a2d1d4ed35c16345bca76a626a5a
parent37d8e02578e1c946bdd3d83dbfc92a0e51f5b7b4
target-arm: Fix BASEPRI, BASEPRI_MAX, and FAULTMASK access

Correct the decode of the register numbers for BASEPRI, BASEPRI_MAX
and FAULTMASK, according to "ARMv7-M Architecture Reference Manual"
issue D section "B5.2.3 MRS" and "B5.2.3 MSR".

Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm/helper.c