[GlobalISel] Add G_VECREDUCE_* opcodes for vector reductions.
authorAmara Emerson <amara@apple.com>
Fri, 2 Oct 2020 18:56:53 +0000 (11:56 -0700)
committerAmara Emerson <amara@apple.com>
Thu, 8 Oct 2020 17:33:19 +0000 (10:33 -0700)
commit283b4d6ba3119730e1722e8d78974b2c29d2492a
tree9599b8030fd5f796032633d4d28add274a76ec16
parent64c0792946b792839b2f39e4e208fdd7398aaea0
[GlobalISel] Add G_VECREDUCE_* opcodes for vector reductions.

These mirror the IR and SelectionDAG intrinsics & nodes.

Opcodes added:
G_VECREDUCE_SEQ_FADD
G_VECREDUCE_SEQ_FMUL
G_VECREDUCE_FADD
G_VECREDUCE_FMUL
G_VECREDUCE_FMAX
G_VECREDUCE_FMIN
G_VECREDUCE_ADD
G_VECREDUCE_MUL
G_VECREDUCE_AND
G_VECREDUCE_OR
G_VECREDUCE_XOR
G_VECREDUCE_SMAX
G_VECREDUCE_SMIN
G_VECREDUCE_UMAX
G_VECREDUCE_UMIN

Differential Revision: https://reviews.llvm.org/D88750
llvm/docs/GlobalISel/GenericOpcode.rst
llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
llvm/include/llvm/Support/TargetOpcodes.def
llvm/include/llvm/Target/GenericOpcodes.td
llvm/lib/CodeGen/MachineVerifier.cpp
llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
llvm/test/MachineVerifier/test_vector_reductions.mir [new file with mode: 0644]