[X86] AMD Zen 3: _REV variants of zero-cycles moves are also zero-cycles (PR50261)
authorRoman Lebedev <lebedev.ri@gmail.com>
Fri, 7 May 2021 15:22:01 +0000 (18:22 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Fri, 7 May 2021 15:27:40 +0000 (18:27 +0300)
commit2819009b5aa9725aebba63e8722e31943a7fb36f
tree1134889e9b1ec5951cf197bba59978fc2b55f9c3
parenta8e30e63aca0e9c61f956e61303ae3694cf00f2c
[X86] AMD Zen 3: _REV variants of zero-cycles moves are also zero-cycles (PR50261)

Sometimes disassembler picks _REV variants of instructions
over the plain ones, which in this case exposed an issue
that the _REV variants aren't being modelled as optimizable moves.
llvm/lib/Target/X86/X86ScheduleZnver3.td
llvm/test/tools/llvm-mca/X86/Znver3/reg-move-elimination-avx-xmm.s
llvm/test/tools/llvm-mca/X86/Znver3/reg-move-elimination-avx-ymm.s