Support a few "shifted register" operations on Arm64 (#75823)
authorTanner Gooding <tagoo@outlook.com>
Tue, 27 Sep 2022 20:30:06 +0000 (13:30 -0700)
committerGitHub <noreply@github.com>
Tue, 27 Sep 2022 20:30:06 +0000 (13:30 -0700)
commit27f1398c4ffcfd3b06a01243b2cab74abe344fd3
tree6b5f524e402f82a8d2296d2641a6af1030a255ed
parent6f9366aaf1cf01e1a2d49fd7e74062c1d6f6553f
Support a few "shifted register" operations on Arm64 (#75823)

* Refactor Lowering::IsContainableBinaryOp so node checks are simpler

* Update Lowering::ContainCheckBinary to check both operands for a commutative oper

* Updating Lowering::IsContainableBinaryOp to support some shifted register instructions

* Resolving some build failures/asserts

* Ensure IsContainableBinaryOp checks IsSafeToContainMem

* Use parentNode not node

* Ensure shifted register instructions that set flags use the right instruction

* Ensure the shift amount is checked for smaller nodes

* Apply suggestions from code review

* Apply suggestions from code review

Co-authored-by: SingleAccretion <62474226+SingleAccretion@users.noreply.github.com>
Co-authored-by: SingleAccretion <62474226+SingleAccretion@users.noreply.github.com>
src/coreclr/jit/codegenarm64.cpp
src/coreclr/jit/codegenlinear.cpp
src/coreclr/jit/lowerarmarch.cpp
src/coreclr/jit/lsrabuild.cpp