drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry.
authorJyoti Yadav <jyoti.r.yadav@intel.com>
Fri, 5 Oct 2018 18:08:46 +0000 (14:08 -0400)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Fri, 12 Oct 2018 22:44:32 +0000 (15:44 -0700)
commit27d7aaae0fd7d7feb232f267c85370da04b593a4
tree026fcabc0c4902f745b6056f14f848c9fa75e38a
parentb9117149fefdcdc6fcd12a14a26d71979582c057
drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry.

DC5 and DC6 counter register tells about residency of DC5 and DC6.
Added the same in debugfs file.

v2 : Remove csr_version check.
     Added generic check regarding DC counters for  Gen9 onwards. (Rodrigo)
v3 : Simplified gen checks. (Chris)
v4 : Simplified "if" ladder for multiple gens.
v5 : Removed unnecessary comment.

Signed-off-by: Jyoti Yadav <jyoti.r.yadav@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1538762926-4880-1-git-send-email-jyoti.r.yadav@intel.com
drivers/gpu/drm/i915/i915_debugfs.c