tegra: Correct PLL access in ap20.c and clock.c
authorSimon Glass <sjg@chromium.org>
Thu, 19 Apr 2012 08:04:39 +0000 (08:04 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sat, 7 Jul 2012 12:07:19 +0000 (14:07 +0200)
commit27c4a3318f716cce0a23248317534bda7792230b
tree74daff034784a48106de6ca2a4bd814066279389
parent00a55add04222539846dd884217bcf40c504da92
tegra: Correct PLL access in ap20.c and clock.c

Correct this warning seen by Albert:

ap20.c:44:18: warning: array subscript is above array bounds

There is a subtle bug here which currently causes no errors, but might
in future if people use PCI or the 32KHz clock. So take the opportunity
to correct the logic now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/cpu/armv7/tegra2/ap20.c
arch/arm/cpu/armv7/tegra2/clock.c
arch/arm/include/asm/arch-tegra2/clock.h