[LLDB][MIPS] Emulation of MIPS64 floating-point branch instructions
authorMohit K. Bhakkad <mohit.bhakkad@gmail.com>
Thu, 18 Jun 2015 06:03:27 +0000 (06:03 +0000)
committerMohit K. Bhakkad <mohit.bhakkad@gmail.com>
Thu, 18 Jun 2015 06:03:27 +0000 (06:03 +0000)
commit276a930eda1cb3e684098cec54cd514b8e2f079d
tree05ed83c19049274a48104b9cf5dac564ff24e3b1
parent58ef391f3ef80cc4e4e375b7e2f1f397afd47b90
[LLDB][MIPS] Emulation of MIPS64 floating-point branch instructions
Patch by Jaydeep Patil

SUMMARY:
1. Added emulation of MIPS64 floating-point branch instructions
2. Updated GetRegisterInfo to recognize floating-point registers
3. Provided CPU information while creating createMCSubtargetInfo in disassembler
4. Bug fix in emulation of JIC and JIALC
5. Correct identification of breakpoint when set in a delay slot of a branch instruction

Reviewers: clayborg
Subscribers: bhushan, mohit.bhakkad, sagar, nitesh.jain, lldb-commits.
Differential Revision: http://reviews.llvm.org/D10355

llvm-svn: 239996
lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.h
lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h