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[RISCV] Add isel patterns for vmacc, vnmsac.
authorYeting Kuo <yeting.kuo@sifive.com>
Wed, 5 Oct 2022 15:34:37 +0000 (23:34 +0800)
committerYeting Kuo <yeting.kuo@sifive.com>
Wed, 12 Oct 2022 01:19:01 +0000 (09:19 +0800)
commit2749b942e90b3dcc08b0b540482de04c49e19865
treeaf271fc97b93e86d733bd637eeaadd9214885e02tree | snapshot
parent23f989a2e3dee21b2ab563441f78adbb3dd42a4bcommit | diff
[RISCV] Add isel patterns for vmacc, vnmsac.

The patch selects VSELECT/VP_MERGE_VL which uses fmadd/fnmsub as true operand
and the adden of the fmadd/fnmsub as false operand.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D135330
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td diff | blob | history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnmsac-vp.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll [new file with mode: 0644] blob
Domain: System / Toolchain;