EDAC/i10nm: Add driver decoder for Ice Lake and Tremont CPUs
authorYouquan Song <youquan.song@intel.com>
Thu, 1 Sep 2022 19:43:10 +0000 (12:43 -0700)
committerTony Luck <tony.luck@intel.com>
Thu, 8 Sep 2022 18:40:01 +0000 (11:40 -0700)
commit2738c69a8813453b35549465867ae591f8598eb0
tree572fe6bb7040d4a553048e794b3c55ec98c16597
parent627d551a9e75ef81525822ba2a0d9d5a64791d89
EDAC/i10nm: Add driver decoder for Ice Lake and Tremont CPUs

Current i10nm_edac only supports firmware decoder (ACPI DSM methods).
MCA bank registers of Ice Lake or Tremont CPUs contain the information
to decode DDR memory errors. To get better decoding performance, add
the driver decoder (decoding DDR memory errors via extracting error
information from MCA bank registers) for Ice Lake and Tremont CPUs.

Co-developed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Youquan Song <youquan.song@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/all/20220901194310.115427-1-tony.luck@intel.com/
arch/x86/include/asm/mce.h
drivers/edac/i10nm_base.c
drivers/edac/skx_common.c
drivers/edac/skx_common.h