drm/amd/display: fix dcn3.1x mode validation on high bandwidth config
authorCharlene Liu <Charlene.Liu@amd.com>
Wed, 2 Nov 2022 16:13:43 +0000 (12:13 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Nov 2022 18:35:14 +0000 (13:35 -0500)
commit27142312c8a44026815df721882468c63c4c96da
tree100b6961744d3cd3f9c99cda06874fd9c77e8780
parent5b8f9deaf3b6badfc0da968e6e07ceabd19700b6
drm/amd/display: fix dcn3.1x mode validation on high bandwidth config

[why]
1. correct dram_channel_width (was hard coded to 4 for 32bit)
2. use dm's is_hvm_enable status flag for hostvm_en input for dml.
3. add a function to override to all dcn3.1x.

Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c
drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c