RISC-V: Print FP regs as union of float types.
authorJim Wilson <jimw@sifive.com>
Mon, 22 Oct 2018 21:10:13 +0000 (14:10 -0700)
committerJim Wilson <jimw@sifive.com>
Mon, 22 Oct 2018 21:10:13 +0000 (14:10 -0700)
commit270b9329b713fdc166f95dfa3a0a2f72f3a49608
tree880ae6d15b5b07aff96c87942acafad62cc23fd3
parent192c2bfbd7a6d4b2069f6b94b020d274a483c198
RISC-V: Print FP regs as union of float types.

A 64-bit FP register can hold either a single or double float value, so
print it as both types by using a union type for FP registers.  Likewise
for 128-bit regs which can also hold long double.

gdb/
* riscv-tdep.c (riscv_fpreg_d_type, riscv_fpreg_q_type): New.
(riscv_register_type): Use them.
(riscv_print_one_register_info): Handle union of floats same as float.
* riscv-tdep.h (struct gdbarch_tdep): Add riscv_fpreg_d_type and
riscv_fpreg_q_type fields.
gdb/ChangeLog
gdb/riscv-tdep.c
gdb/riscv-tdep.h