Update {skylake,icelake,alderlake}_cost to add a bit preference to vector store.

Update {skylake,icelake,alderlake}_cost to add a bit preference to vector store.

Since the interger vector construction cost has changed, we need to adjust the
load and store costs for intel processers.

With the patch applied
538.imagic_r:gets ~6% improvement on ADL for multicopy.
525.x264_r  :gets ~2% improvement on ADL and ICX for multicopy.
with no measurable changes for other benchmarks.

gcc/ChangeLog

	PR target/105493
	* config/i386/x86-tune-costs.h (skylake_cost): Raise the gpr load cost
	from 4 to 6 and gpr store cost from 6 to 8. Change SSE loads and
	unaligned loads cost from {6, 6, 6, 10, 20} to {8, 8, 8, 8, 16}.
	(icelake_cost): Ditto.
	(alderlake_cost): Raise the gpr store cost from 6 to 8 and SSE loads,
	stores and unaligned stores cost from {6, 6, 6, 10, 15} to
	{8, 8, 8, 10, 15}.

gcc/testsuite/

	PR target/105493
	* gcc.target/i386/pr91446.c: Adjust to expect vectorization
	* gcc.target/i386/pr99881.c: XFAIL.
	* gcc.target/i386/pr105493.c: New.
	* g++.target/i386/pr105638.C: Use other sequence checks
	instead of vpxor, because code generation changed.