clk: qcom: flag for 64 bit CONFIG_CTL
authorAbhishek Sahu <absahu@codeaurora.org>
Thu, 28 Sep 2017 17:50:43 +0000 (23:20 +0530)
committerStephen Boyd <sboyd@codeaurora.org>
Wed, 13 Dec 2017 21:45:32 +0000 (13:45 -0800)
commit26945e0a2341523170aa5b6ff4cc35e9ce1f7cf4
tree2be3f77a1a0809f4e9b7c21345848f444d30c871
parent1e859d3e03f0ac97d15e1952bddda4b29de1c71c
clk: qcom: flag for 64 bit CONFIG_CTL

Some of the Alpha PLLs (like Spark and Brammo) don't have a
CONFIG_CTL_U register. Add logic to detect when PLLs don't have
this second config register and skip programming it during PLL
initialization.

Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/qcom/clk-alpha-pll.c