i386: Optimize _mm_storeu_si16 w/o SSE4 [PR105079]
Optimize _mm_storeu_si16 to use MOVD from a SSE to an integer register
instead of PEXTRW from a low word of the SSE register to an integer reg.
Avoid the transformation when optimizing for size for targets without
TARGET_INTER_UNIT_MOVES_FROM_VEC capability, where the transformation
results in two moves via a memory location.
2022-05-03 Uroš Bizjak <ubizjak@gmail.com>
gcc/ChangeLog:
PR target/105079
* config/i386/sse.md (*vec_extract<mode>_0_mem): New pre-reload
define_insn_and_split pattern.
gcc/testsuite/ChangeLog:
PR target/105079
* gcc.target/i386/pr105079.c: New test.
* gcc.target/i386/pr95483-1.c (dg-options): Use -msse4.1.