projects / platform / upstream / gcc.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: b947b54) | patch
rs6000.md (prefetch): Generate ISA 2.06 instructions dcbtt and dcbtstt if operands...
authorCarl Love <cel@us.ibm.com>
Thu, 10 May 2018 20:22:22 +0000 (20:22 +0000)
committerCarl Love <carll@gcc.gnu.org>
Thu, 10 May 2018 20:22:22 +0000 (20:22 +0000)
commit267eee04fe4a0f18189f0ab620303656ba316ea7
tree386606e65fb044d8b305b66156ffedc5b36db19dtree | snapshot
parentb947b54c3d5f50316d88d50decf14879250a9988commit | diff
rs6000.md (prefetch): Generate ISA 2.06 instructions dcbtt and dcbtstt if operands[2] is 0.

gcc/ChangeLog:

2018-05-10  Carl Love  <cel@us.ibm.com>

* config/rs6000/rs6000.md (prefetch): Generate ISA 2.06 instructions
dcbtt and dcbtstt if operands[2] is 0.

From-SVN: r260134
gcc/ChangeLog diff | blob | history
gcc/config/rs6000/rs6000.md diff | blob | history
Domain: System / Toolchain;