x86: Allow V1TI vector register pushes

x86: Allow V1TI vector register pushes

Add V1TI vector register push and split it after reload to a sequence
of:

(set (reg:P SP_REG) (plus:P SP_REG) (const_int -8)))
(set (match_dup 0) (match_dup 1))

so that STV pass can convert TI mode integer push to V1TI vector register
push.  Rename has_non_address_hard_reg to pseudo_reg_set, combine calls
of single_set and has_non_address_hard_reg to pseudo_reg_set, to ignore
pseudo register push.

Remove c-c++-common/dfp/func-vararg-mixed-2.c since it is compiled with
-mpreferred-stack-boundary=2 and leads to segfault:

Dump of assembler code for function __bid_nesd2:
   0x08049210 <+0>:	endbr32
   0x08049214 <+4>:	push   %esi
   0x08049215 <+5>:	push   %ebx
   0x08049216 <+6>:	call   0x8049130 <__x86.get_pc_thunk.bx>
   0x0804921b <+11>:	add    $0x8de5,%ebx
   0x08049221 <+17>:	sub    $0x20,%esp
   0x08049224 <+20>:	mov    0x30(%esp),%esi
   0x08049228 <+24>:	pushl  0x2c(%esp)
   0x0804922c <+28>:	call   0x804e600 <__bid32_to_bid64>
   0x08049231 <+33>:	mov    %esi,(%esp)
   0x08049234 <+36>:	movd   %edx,%xmm1
   0x08049238 <+40>:	movd   %eax,%xmm0
   0x0804923c <+44>:	punpckldq %xmm1,%xmm0
=> 0x08049240 <+48>:	movaps %xmm0,0x10(%esp)
   0x08049245 <+53>:	call   0x804e600 <__bid32_to_bid64>
   0x0804924a <+58>:	push   %edx
   0x0804924b <+59>:	push   %eax
   0x0804924c <+60>:	pushl  0x1c(%esp)
   0x08049250 <+64>:	pushl  0x1c(%esp)
   0x08049254 <+68>:	call   0x804b260 <__bid64_quiet_not_equal>
   0x08049259 <+73>:	add    $0x34,%esp
   0x0804925c <+76>:	pop    %ebx
   0x0804925d <+77>:	pop    %esi
   0x0804925e <+78>:	ret

when libgcc is compiled with -msse2.  According to GCC manual:

'-mpreferred-stack-boundary=NUM'
     Attempt to keep the stack boundary aligned to a 2 raised to NUM
     byte boundary.  If '-mpreferred-stack-boundary' is not specified,
     the default is 4 (16 bytes or 128-bits).

     *Warning:* If you use this switch, then you must build all modules
     with the same value, including any libraries.  This includes the
     system libraries and startup modules.

c-c++-common/dfp/func-vararg-mixed-2.c, which was added by

commit 3b2488ca6ece182f2136a20ee5fa0bb92f935b0f
Author: H.J. Lu <hongjiu.lu@intel.com>
Date:   Wed Jul 30 19:24:02 2008 +0000

    func-vararg-alternate-d128-2.c: New.

    2008-07-30  H.J. Lu  <hongjiu.lu@intel.com>
                Joey Ye  <joey.ye@intel.com>

            * gcc.dg/dfp/func-vararg-alternate-d128-2.c: New.
            * gcc.dg/dfp/func-vararg-mixed-2.c: Likewise.

isn't expected to work with libgcc.

gcc/

	PR target/95021
	* config/i386/i386-features.c (has_non_address_hard_reg):
	Renamed to ...
	(pseudo_reg_set): This.  Return the SET expression.  Ignore
	pseudo register push.
	(general_scalar_to_vector_candidate_p): Combine single_set and
	has_non_address_hard_reg calls to pseudo_reg_set.
	(timode_scalar_to_vector_candidate_p): Likewise.
	* config/i386/i386.md (*pushv1ti2): New pattern.

gcc/testsuite/

	PR target/95021
	* c-c++-common/dfp/func-vararg-mixed-2.c: Removed.
	* gcc.target/i386/pr95021-1.c: New test.
	* gcc.target/i386/pr95021-2.c: Likewise.
	* gcc.target/i386/pr95021-3.c: Likewise.
	* gcc.target/i386/pr95021-4.c: Likewise.
	* gcc.target/i386/pr95021-5.c: Likewise.