ice: rearm other interrupt cause register after enabling VFs
authorPaul Greenwalt <paul.greenwalt@intel.com>
Mon, 12 Jul 2021 11:54:25 +0000 (07:54 -0400)
committerTony Nguyen <anthony.l.nguyen@intel.com>
Tue, 7 Dec 2021 21:21:01 +0000 (13:21 -0800)
commit2657e16d8c52fb6ffc7250b0b6536f93886e32d6
tree3e3c83f623ab55df77523f1886ea89362ac3415b
parentf23ab04dd6f703e282bb2d51fe3ae14f4b88a628
ice: rearm other interrupt cause register after enabling VFs

The other interrupt cause register (OICR), global interrupt 0, is
disabled when enabling VFs to prevent handling VFLR. If the OICR is
not rearmed then the VF cannot communicate with the PF.

Rearm the OICR after enabling VFs.

Fixes: 916c7fdf5e93 ("ice: Separate VF VSI initialization/creation from reset flow")
Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Tested-by: Tony Brelinski <tony.brelinski@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c