[RISCV] Implement MC relaxations for compressed instructions.
authorSameer AbuAsal <sabuasal@codeaurora.org>
Fri, 2 Mar 2018 22:04:12 +0000 (22:04 +0000)
committerSameer AbuAsal <sabuasal@codeaurora.org>
Fri, 2 Mar 2018 22:04:12 +0000 (22:04 +0000)
commit2646a41e54ba858fdcb0d52fb7286af5ecbc0d38
treebe04597a8f2c3cd5a6b48af93145177e8cbe874c
parente403c862cc0788236269730e272c91fec74c4a9a
[RISCV] Implement MC relaxations for compressed instructions.

Summary:
     This patch implements relaxation for RISCV in the MC layer.
      The following relaxations are currently handled:
      1) Relax C_BEQZ to BEQ and C_BNEZ to BNEZ in RISCV.
      2) Relax and C_J $imm  to JAL x0, $imm  and CJAL to JAL ra, $imm.

Reviewers: asb, llvm-commits, efriedma

Reviewed By: asb

Subscribers: shiva0217

Differential Revision: https://reviews.llvm.org/D43055

llvm-svn: 326626
llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
llvm/test/MC/RISCV/fixups-compressed.s
llvm/test/MC/RISCV/relocations.s
llvm/test/MC/RISCV/rv32-relaxation.s [new file with mode: 0644]
llvm/test/MC/RISCV/rv64-relaxation.s [new file with mode: 0644]