drm/i915: Workaround incoherence between fences and LLC across multiple CPUs
authorChris Wilson <chris@chris-wilson.co.uk>
Thu, 4 Apr 2013 20:31:03 +0000 (21:31 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 18 Apr 2013 07:43:10 +0000 (09:43 +0200)
commit25ff1195f8a0b3724541ae7bbe331b4296de9c06
treefc0af467c651177f6581f838001e2d05af75794a
parent8bb6e9590b6a568c643d0e8e73e0689ceb489e01
drm/i915: Workaround incoherence between fences and LLC across multiple CPUs

In order to fully serialize access to the fenced region and the update
to the fence register we need to take extreme measures on SNB+, and
manually flush writes to memory prior to writing the fence register in
conjunction with the memory barriers placed around the register write.

Fixes i-g-t/gem_fence_thrash

v2: Bring a bigger gun
v3: Switch the bigger gun for heavier bullets (Arjan van de Ven)
v4: Remove changes for working generations.
v5: Reduce to a per-cpu wbinvd() call prior to updating the fences.
v6: Rewrite comments to ellide forgotten history.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62191
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jon Bloomfield <jon.bloomfield@intel.com>
Tested-by: Jon Bloomfield <jon.bloomfield@intel.com> (v2)
Cc: stable@vger.kernel.org
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_gem.c