rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 64bit)

rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 64bit)

Create a non-cacheable mapping for the 0x600000000 physical memory region,
where MMIO registers for the PCIe XHCI controller are instantiated by the
PCIe bridge.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Idcbaf78228aa87d992020b3fe0a0d4c9fdfa1329