powerpc, hw_breakpoint: Handle concurrent alignment interrupts
authorK.Prasad <prasad@linux.vnet.ibm.com>
Tue, 15 Jun 2010 06:05:31 +0000 (11:35 +0530)
committerPaul Mackerras <paulus@samba.org>
Tue, 22 Jun 2010 09:40:50 +0000 (19:40 +1000)
commit2538c2d08f46141550a1e68819efa8fe31c6e3dc
treec84255fa8dbc9446d4ff546988adabc12450b880
parent5aae8a53708025d4e718f0d2e7c2f766779ddc71
powerpc, hw_breakpoint: Handle concurrent alignment interrupts

If an alignment interrupt occurs on an instruction that is being
single-stepped, the alignment interrupt handler currently handles
the single-step condition by unconditionally sending a SIGTRAP to
the process.  Other synchronous interrupts that result in the
instruction being emulated do likewise.

With hw_breakpoint support, the hw_breakpoint code needs to be able
to intercept these single-step events as well as those where the
instruction executes normally and a trace interrupt happens.

Fix this by making emulate_single_step() use the existing
single_step_exception() function instead of calling _exception()
directly.  We then make single_step_exception() use the abstracted
clear_single_step() rather than clearing bits in the MSR image
directly so that emulate_single_step() will continue to work
correctly on Book 3E processors.

Signed-off-by: K.Prasad <prasad@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
arch/powerpc/kernel/traps.c