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(parent: 8557f95) | patch
MIPS: R6 sets FR1 as default
authorRaghu Gandham <raghu.gandham@imgtec.com>
Tue, 2 Dec 2014 23:31:21 +0000 (15:31 -0800)
committerRaghu Gandham <raghu.gandham@imgtec.com>
Tue, 2 Dec 2014 23:31:21 +0000 (15:31 -0800)
commit24f5945644e0f19515d84002391871810028bf43
treeabbbcb6c999fb8685a03af6983485a14f2183969tree | snapshot
parent8557f9582f0f9bd91cbba09a81ba1c32e574d38bcommit | diff
MIPS: R6 sets FR1 as default

MIPS R6 has only FR1 FPU. So, applications are ran under
this default now.

If MIPS R2 emulation happens then thread flag is switched back to FR0.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
arch/mips/include/asm/elf.h diff | blob | history
arch/mips/kernel/traps.c diff | blob | history
Domain: System / Kernel;