clk: sunxi-ng: sun8i: a23: Use sigma-delta modulation for audio PLL
authorChen-Yu Tsai <wens@csie.org>
Thu, 12 Oct 2017 08:37:05 +0000 (16:37 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Fri, 13 Oct 2017 07:27:38 +0000 (09:27 +0200)
commit24ea78a09f8948484e466474c038411a926f670f
tree72071f3333ddec70d8aeec29f1eca6eb110f76b1
parentee6501d69217a887cb496c42ff97ba43adff4ab1
clk: sunxi-ng: sun8i: a23: Use sigma-delta modulation for audio PLL

The audio blocks require specific clock rates. Until now we were using
the closest clock rate possible with integer N-M factors. This resulted
in audio playback being slightly slower than it should be.

The vendor kernel gets around this (for newer SoCs) by using sigma-delta
modulation to generate a fractional-N factor. As the PLL hardware is
identical in most chips, we can back port the settings from the newer
SoC, in this case the H3, onto the A23.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/clk/sunxi-ng/ccu-sun8i-a23.c