[X86][Costmodel] Load/store i16 Stride=6 VF=8 interleaving costs
authorRoman Lebedev <lebedev.ri@gmail.com>
Tue, 28 Sep 2021 16:15:07 +0000 (19:15 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Tue, 28 Sep 2021 16:15:07 +0000 (19:15 +0300)
commit24e42f7d28e98152484cf9bbf8ee4080f5082da0
treefb87096819e8b8af7d64d9956f66c44d362200fe
parentb3011bcc78926686dd95bd5dbb4c2c66d8be24a2
[X86][Costmodel] Load/store i16 Stride=6 VF=8 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/3Tc5s897j - for intels `Block RThroughput: =39.0`; for ryzens, `Block RThroughput: <=13.5`
So pick cost of `39`.

For store we have:
https://godbolt.org/z/fo1h9E67e - for intels `Block RThroughput: =21.0`; for ryzens, `Block RThroughput: <=12.0`
So pick cost of `21`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110592
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-6.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-6.ll