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[RISCV 4/10] Add basic RISCV{InstrFormats,InstrInfo,RegisterInfo,}.td
authorAlex Bradbury <asb@lowrisc.org>
Tue, 1 Nov 2016 23:40:28 +0000 (23:40 +0000)
committerAlex Bradbury <asb@lowrisc.org>
Tue, 1 Nov 2016 23:40:28 +0000 (23:40 +0000)
commit24d9b13b36bdd14a4bc7ad29f6715bd9ebbdfed8
tree0664031c76134b7f76fa2c18bbf1277c474f9f9dtree | snapshot
parentc507cdb4bca79c6a82061c114c1d0d6e6eee73a1commit | diff
[RISCV 4/10] Add basic RISCV{InstrFormats,InstrInfo,RegisterInfo,}.td

For now, only add instruction definitions for basic ALU operations. Our
initial target is a working MC layer rather than codegen, so appropriate
SelectionDAG patterns will come later.

Differential Revision: https://reviews.llvm.org/D23561

llvm-svn: 285769
llvm/lib/Target/RISCV/CMakeLists.txt diff | blob | history
llvm/lib/Target/RISCV/RISCV.td [new file with mode: 0644] blob
llvm/lib/Target/RISCV/RISCVInstrFormats.td [new file with mode: 0644] blob
llvm/lib/Target/RISCV/RISCVInstrInfo.td [new file with mode: 0644] blob
llvm/lib/Target/RISCV/RISCVRegisterInfo.td [new file with mode: 0644] blob
Domain: System / Toolchain;