[AMDGPU][GlobalISel] Improve regbankselect for 64-bit VGPR ctlz_zero_undef/cttz_zero_...
authorJay Foad <jay.foad@amd.com>
Wed, 4 Aug 2021 10:55:29 +0000 (11:55 +0100)
committerJay Foad <jay.foad@amd.com>
Fri, 6 Aug 2021 08:40:48 +0000 (09:40 +0100)
commit24b67a9024cc1a757466b4a40c05b4fd8e4b3c69
tree6282d0da9d1e578603026162116205767700f674
parentd77b43c385276536c48c02761d7149e0dbad5aae
[AMDGPU][GlobalISel] Improve regbankselect for 64-bit VGPR ctlz_zero_undef/cttz_zero_undef

We can improve on the generic splitting by using ffbh/ffbl, which have a
defined result when the input is zero.

Differential Revision: https://reviews.llvm.org/D107442
llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctlz-zero-undef.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-cttz-zero-undef.mir
llvm/test/CodeGen/AMDGPU/ctlz.ll
llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
llvm/test/CodeGen/AMDGPU/cttz.ll
llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll