86xx: Allow for fewer DDR slots per memory controller.
authorJon Loeliger <jdl@freescale.com>
Mon, 27 Aug 2007 17:41:03 +0000 (12:41 -0500)
committerWolfgang Denk <wd@denx.de>
Tue, 16 Oct 2007 14:36:36 +0000 (16:36 +0200)
commit2491167c245d8ebe6f2dbd8c4287aaa0d14fe93a
treeaacfd2e16eaf6bfc8fc5c5bdbba6c7dd52a5e9b0
parent4d4a945e189a2f384c66432316da2788a0ac1607
86xx: Allow for fewer DDR slots per memory controller.

As a direct correlation exists between DDR DIMM slots
and SPD EEPROM addresses used to configure them, use
the individually defined SPD_EEPROM_ADDRESS* values to
determine if a DDR DIMM slot should have its SPD
configuration read or not.

Effectively, this now allows for 1 or 2 DIMM slots
per memory controller.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
cpu/mpc86xx/spd_sdram.c