scsi: ufs: core: mcq: Configure operation and runtime interface
authorAsutosh Das <quic_asutoshd@quicinc.com>
Fri, 13 Jan 2023 20:48:45 +0000 (12:48 -0800)
committerMartin K. Petersen <martin.petersen@oracle.com>
Sat, 14 Jan 2023 02:03:37 +0000 (21:03 -0500)
commit2468da61ea095162067ed408824298ba9c3661c8
treed6ee8cc30ba2f3897a38123c2db30b03a2903775
parent4682abfae2eb3a1c138130cfd6d71411d81aaa00
scsi: ufs: core: mcq: Configure operation and runtime interface

Runtime and operation registers are defined per Submission and Completion
queue.  The location of these registers is not defined in the spec; meaning
the offsets and stride may vary for different HC vendors. Establish the
stride, base address, and doorbell address offsets from vendor host driver
and program it.

Co-developed-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/ufs/core/ufs-mcq.c
drivers/ufs/core/ufshcd-priv.h
drivers/ufs/core/ufshcd.c
drivers/ufs/host/ufs-qcom.c
include/ufs/ufshcd.h
include/ufs/ufshci.h