MIPS: CI20: Reduce clocksource to 750 kHz.
author周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Sat, 26 Jun 2021 06:18:40 +0000 (14:18 +0800)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Wed, 30 Jun 2021 12:37:16 +0000 (14:37 +0200)
commit23c64447b3538a6f34cb38aae3bc19dc1ec53436
tree8a1c83e85af03c8d6be06c0b9b5db01352036daf
parentab3040e1379bd6fcc260f1f7558ee9c2da62766b
MIPS: CI20: Reduce clocksource to 750 kHz.

The original clock (3 MHz) is too fast for the clocksource,
there will be a chance that the system may get stuck.

Reported-by: Nikolaus Schaller <hns@goldelico.com>
Tested-by: Nikolaus Schaller <hns@goldelico.com> # on CI20
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/boot/dts/ingenic/ci20.dts