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[RISCV] Prevent constant hoisting for or/and/xor that can use bseti/bclri/binvi.
authorCraig Topper <craig.topper@sifive.com>
Thu, 5 Jan 2023 19:18:26 +0000 (11:18 -0800)
committerCraig Topper <craig.topper@sifive.com>
Thu, 5 Jan 2023 19:18:31 +0000 (11:18 -0800)
commit239a174d92dd2bd99ecb1308dc8937040895b04d
tree050a8fc0fee42ba997318ada71ac141bdba96dc8tree | snapshot
parentb58927ec0c4e57e24d5868802bd3ee119e552454commit | diff
[RISCV] Prevent constant hoisting for or/and/xor that can use bseti/bclri/binvi.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D140928
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp diff | blob | history
llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll diff | blob | history
Domain: System / Toolchain;