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(parent: ac50317) | patch
drm/i915/mtl: For DP2.0 10G and 20G rates use MPLLA
authorMika Kahola <mika.kahola@intel.com>
Fri, 28 Apr 2023 09:54:26 +0000 (12:54 +0300)
committerRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Fri, 28 Apr 2023 21:52:01 +0000 (14:52 -0700)
commit237e7be0bf57c2dd36f074d3b03a3291db3b3abf
treec94084b0581f1891f56d4613434dab34f3f93227tree | snapshot
parentac50317e2659143bd1111b1785b5c0fa0ac1f6bfcommit | diff
drm/i915/mtl: For DP2.0 10G and 20G rates use MPLLA

Use MPLLA for DP2.0 rates 10G and 20G, when ssc is enabled.

v2: Fix typo in commit message (Animesh)

Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230428095433.4109054-7-mika.kahola@intel.com
drivers/gpu/drm/i915/display/intel_cx0_phy.c diff | blob | history
Domain: System / Kernel;