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(parent: 94d0914) | patch
[X86] AVX512FP16 instructions enabling 3/6
authorWang, Pengfei <pengfei.wang@intel.com>
Wed, 18 Aug 2021 01:03:01 +0000 (09:03 +0800)
committerWang, Pengfei <pengfei.wang@intel.com>
Wed, 18 Aug 2021 01:03:41 +0000 (09:03 +0800)
commit2379949aadcee8d4028dec0508f88bda290636bc
tree01274b48d20e669f1264af926aa17700366e360btree | snapshot
parent94d091429253e46e4cdd31a30e4d1b25b2879d6acommit | diff
[X86] AVX512FP16 instructions enabling 3/6

Enable FP16 conversion instructions.

Ref.: https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D105265
46 files changed:
clang/include/clang/Basic/BuiltinsX86.def diff | blob | history
clang/include/clang/Basic/BuiltinsX86_64.def diff | blob | history
clang/lib/CodeGen/CGBuiltin.cpp diff | blob | history
clang/lib/Headers/avx512fp16intrin.h diff | blob | history
clang/lib/Headers/avx512vlfp16intrin.h diff | blob | history
clang/lib/Sema/SemaChecking.cpp diff | blob | history
clang/test/CodeGen/X86/avx512fp16-builtins.c diff | blob | history
clang/test/CodeGen/X86/avx512vlfp16-builtins.c diff | blob | history
llvm/include/llvm/IR/IntrinsicsX86.td diff | blob | history
llvm/include/llvm/IR/RuntimeLibcalls.def diff | blob | history
llvm/lib/CodeGen/TargetLoweringBase.cpp diff | blob | history
llvm/lib/Target/X86/X86ISelLowering.cpp diff | blob | history
llvm/lib/Target/X86/X86InstrAVX512.td diff | blob | history
llvm/lib/Target/X86/X86InstrFoldTables.cpp diff | blob | history
llvm/lib/Target/X86/X86InstrFragmentsSIMD.td diff | blob | history
llvm/lib/Target/X86/X86InstrInfo.cpp diff | blob | history
llvm/lib/Target/X86/X86InstrSSE.td diff | blob | history
llvm/lib/Target/X86/X86IntrinsicsInfo.h diff | blob | history
llvm/test/CodeGen/X86/avx512fp16-arith-intrinsics.ll diff | blob | history
llvm/test/CodeGen/X86/avx512fp16-arith-vl-intrinsics.ll diff | blob | history
llvm/test/CodeGen/X86/avx512fp16-arith.ll diff | blob | history
llvm/test/CodeGen/X86/avx512fp16-cvt-ph-w-intrinsics.ll [new file with mode: 0644] blob
llvm/test/CodeGen/X86/avx512fp16-cvt-ph-w-vl-intrinsics.ll [new file with mode: 0644] blob
llvm/test/CodeGen/X86/avx512fp16-cvt.ll [new file with mode: 0644] blob
llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll diff | blob | history
llvm/test/CodeGen/X86/avx512fp16vl-intrinsics.ll diff | blob | history
llvm/test/CodeGen/X86/cvt16-2.ll [new file with mode: 0644] blob
llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll diff | blob | history
llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/X86/fp-strict-scalar-inttofp-fp16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl.ll diff | blob | history
llvm/test/CodeGen/X86/vec-strict-128-fp16.ll diff | blob | history
llvm/test/CodeGen/X86/vec-strict-256-fp16.ll diff | blob | history
llvm/test/CodeGen/X86/vec-strict-512-fp16.ll diff | blob | history
llvm/test/CodeGen/X86/vec-strict-fptoint-128-fp16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/X86/vec-strict-fptoint-256-fp16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/X86/vec-strict-fptoint-512-fp16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/X86/vec-strict-inttofp-128-fp16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/X86/vec-strict-inttofp-256-fp16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/X86/vec-strict-inttofp-512-fp16.ll [new file with mode: 0644] blob
llvm/test/MC/Disassembler/X86/avx512fp16.txt diff | blob | history
llvm/test/MC/Disassembler/X86/avx512fp16vl.txt diff | blob | history
llvm/test/MC/X86/avx512fp16.s diff | blob | history
llvm/test/MC/X86/avx512fp16vl.s diff | blob | history
llvm/test/MC/X86/intel-syntax-avx512fp16.s diff | blob | history
llvm/test/MC/X86/intel-syntax-avx512fp16vl.s diff | blob | history
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