perf/x86/intel: Add Tiger Lake CPU support
authorKan Liang <kan.liang@linux.intel.com>
Tue, 8 Oct 2019 15:50:08 +0000 (08:50 -0700)
committerIngo Molnar <mingo@kernel.org>
Sat, 12 Oct 2019 13:13:09 +0000 (15:13 +0200)
commit23645a76ba816652d6898def2ee69c6a6250c9b1
tree109d7e94e017ec3a86f471d6379f19d697d7d6b6
parentf1857a2467755e5faa3c727d7146b6db960abee1
perf/x86/intel: Add Tiger Lake CPU support

Tiger Lake is the followon to Ice Lake. From the perspective of Intel
core PMU, there is little changes compared with Ice Lake, e.g. small
changes in event list. But it doesn't impact on core PMU functionality.
Share the perf code with Ice Lake. The event list patch will be submitted
later separately.

The patch has been tested on real hardware.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/1570549810-25049-8-git-send-email-kan.liang@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/events/intel/core.c