gpu: host1x: handle the correct # of syncpt regs
authorStephen Warren <swarren@nvidia.com>
Fri, 4 Apr 2014 22:31:05 +0000 (16:31 -0600)
committerThierry Reding <treding@nvidia.com>
Wed, 16 Apr 2014 15:11:04 +0000 (17:11 +0200)
commit22bbd5d949dc7fdd72a4e78e767fa09d8e54b446
treee73b7cda4dccea18d1eb986ac37cb015d77f8e17
parentc9eaa447e77efe77b7fa4c953bd62de8297fd6c5
gpu: host1x: handle the correct # of syncpt regs

BIT_WORD() truncates rather than rounds, so the loops in
syncpt_thresh_isr() and _host1x_intr_disable_all_syncpt_intrs() use <=
rather than < in an attempt to process the correct number of registers
when rounding of the conversion of count of bits to count of words is
necessary. However, when rounding isn't necessary because the value is
already a multiple of the divisor (as is the case for all values of
nb_pts the code actually sees), this causes one too many registers to
be processed.

Solve this by using and explicit DIV_ROUND_UP() call, rather than
BIT_WORD(), and comparing with < rather than <=.

Fixes: 7ede0b0bf3e2 ("gpu: host1x: Add syncpoint wait and interrupts")
Cc: <stable@vger.kernel.org> # 3.10
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/gpu/host1x/hw/intr_hw.c