[RISCV] Look through copies when trying to find an implicit def in addVSetVL.
authorCraig Topper <craig.topper@sifive.com>
Tue, 16 Mar 2021 14:49:24 +0000 (07:49 -0700)
committerCraig Topper <craig.topper@sifive.com>
Tue, 16 Mar 2021 14:59:09 +0000 (07:59 -0700)
commit229eeb187d42fab9ef73be7ce82a50ed63914819
tree864a172c4355c94738c7a7dc322a0d3896a1ab42
parent61ca706461c5e1edc18526c9ddc3250fe074ed94
[RISCV] Look through copies when trying to find an implicit def in addVSetVL.

The InstrEmitter can sometimes insert a copy after an IMPLICIT_DEF
before connecting it to the vector instruction. This occurs when
constrainRegClass reduces to a class with less than 4 registers.
I believe LMUL8 on masked instructions triggers this since the
result can only use the v8, v16, or v24 register group as the mask
is using v0.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D98567
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/rvv/masked-load-fp.ll
llvm/test/CodeGen/RISCV/rvv/masked-load-int.ll
llvm/test/CodeGen/RISCV/rvv/tail-agnostic-impdef-copy.mir [new file with mode: 0644]