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[X86] Teach combineCVTPH2PS to shrink v8i16 loads when the output type is v4f32....
authorCraig Topper <craig.topper@intel.com>
Sat, 22 Feb 2020 01:56:35 +0000 (17:56 -0800)
committerCraig Topper <craig.topper@intel.com>
Sat, 22 Feb 2020 02:11:07 +0000 (18:11 -0800)
commit228a2bc9b70c3d93bd28f0038a8664ef8dac042e
tree3c7d30d59019d4260ffc51d94102de80bb19266etree | snapshot
parent1b1a97e9b55754302c4b41f6bddc8fbc3870f68acommit | diff
[X86] Teach combineCVTPH2PS to shrink v8i16 loads when the output type is v4f32. Remove extra isel patterns.

Similar to what do for other operations that use a subset of bits.
Allows us to remove a pattern that shrinks a load. Which was
incorrect if the load was volatile.
llvm/lib/Target/X86/X86ISelLowering.cpp diff | blob | history
llvm/lib/Target/X86/X86InstrAVX512.td diff | blob | history
llvm/lib/Target/X86/X86InstrSSE.td diff | blob | history
Domain: System / Toolchain;