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(parent: b1a0eb7) | patch
hw/intc/arm_gicv3: Add IRQ handling CPU interface registers
authorPeter Maydell <peter.maydell@linaro.org>
Fri, 17 Jun 2016 14:23:48 +0000 (15:23 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 17 Jun 2016 14:23:51 +0000 (15:23 +0100)
commit227a8653669a8526dcef1020982628282f44820d
treed9bd2ecaa4f7817f934e98056a7a770b35d6650atree | snapshot
parentb1a0eb777d9304ad69c577d5fdd8e20e4bf5644fcommit | diff
hw/intc/arm_gicv3: Add IRQ handling CPU interface registers

Add the CPU interface registers which deal with acknowledging
and dismissing interrupts.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1465915112-29272-19-git-send-email-peter.maydell@linaro.org
hw/intc/arm_gicv3_cpuif.c diff | blob | history
hw/intc/gicv3_internal.h diff | blob | history
trace-events diff | blob | history
Domain: SDK / Emulator;