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(parent: 65abc8e) | patch
dt-bindings: memory: tegra20: emc: Correct registers range in example
authorDmitry Osipenko <digetx@gmail.com>
Wed, 4 Nov 2020 16:48:40 +0000 (19:48 +0300)
committerKrzysztof Kozlowski <krzk@kernel.org>
Thu, 5 Nov 2020 19:35:37 +0000 (20:35 +0100)
commit21d3cdd0391bb01b348a47ec117eff3b9615d3a9
treed782b2abdf564e5868e1b0a7fea47443523da813tree | snapshot
parent65abc8ef57009b95fcded5136aed8ccaff46b903commit | diff
dt-bindings: memory: tegra20: emc: Correct registers range in example

There is superfluous zero in the registers base address and registers
size should be twice bigger.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20201104164923.21238-5-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt diff | blob | history
Domain: System / Kernel;