[X86] Remove isel patterns for using unmasked vmovdqa32/vmovdqu32 for integer vector...
authorCraig Topper <craig.topper@intel.com>
Thu, 18 Jan 2018 07:44:06 +0000 (07:44 +0000)
committerCraig Topper <craig.topper@intel.com>
Thu, 18 Jan 2018 07:44:06 +0000 (07:44 +0000)
commit21c8a8fa499c2e5dcafeb82ab2f438e41abe7cb7
tree6dddd9673c5f8c0ca0b88525ec61af7fcf092407
parent899d6980fa4015005e6379608b24a3ff347f3071
[X86] Remove isel patterns for using unmasked vmovdqa32/vmovdqu32 for integer vector loads.

These patterns were just looking for a vXi64 bitcasted to vXi32, but there is no advantage to using vmovdqa32 over vmovdqa64.

llvm-svn: 322819
17 files changed:
llvm/lib/Target/X86/X86InstrAVX512.td
llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll
llvm/test/CodeGen/X86/avx512-shuffle-schedule.ll
llvm/test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll
llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
llvm/test/CodeGen/X86/avx512-shuffles/permute.ll
llvm/test/CodeGen/X86/avx512-vpternlog-commute.ll
llvm/test/CodeGen/X86/shuffle-strided-with-offset-512.ll
llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll
llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
llvm/test/CodeGen/X86/vector-rotate-512.ll
llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
llvm/test/CodeGen/X86/vector-shift-lshr-512.ll
llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll
llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll
llvm/test/CodeGen/X86/vector-shuffle-v1.ll