armv8: Fix TCR macros for shareability attribute
authorZhichun Hua <zhichun.hua@freescale.com>
Mon, 29 Jun 2015 07:49:37 +0000 (15:49 +0800)
committerYork Sun <yorksun@freescale.com>
Mon, 20 Jul 2015 18:44:40 +0000 (11:44 -0700)
commit21a257b9b3b29ddb1445fdafe12e05727080a198
tree87ea425ec314d57771e74a0200c5ad0684329541
parent25195600173e618b1cf693bcf38d48973e3a08fb
armv8: Fix TCR macros for shareability attribute

For ARMv8, outer shareable is 0b10, inner shareable is 0b11 at bit
position [13:12] of TCR_ELx register.

Signed-off-by: Zhichun Hua <zhichun.hua@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
arch/arm/include/asm/armv8/mmu.h