panfrost/midgard: Implement register spilling
authorAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fri, 19 Jul 2019 20:21:11 +0000 (13:21 -0700)
committerAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Mon, 22 Jul 2019 15:20:34 +0000 (08:20 -0700)
commit21510c253ca8f381fb39d365eb0770b47a44add0
tree1075f3e6b63bb6f005c8fa76fac4e1b6fe020202
parent533d65786f43f23306c9e65d1d7022cf506a143f
panfrost/midgard: Implement register spilling

Now that we run RA in a loop, before each iteration after a failed
allocation we choose a spill node and spill it to Thread Local Storage
using st_int4/ld_int4 instructions (for spills and fills respectively).

This allows us to compile complex shaders that normally would not fit
within the 16 work register limits, although it comes at a fairly steep
performance penalty.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
src/gallium/drivers/panfrost/pan_context.c
src/panfrost/midgard/compiler.h
src/panfrost/midgard/midgard_ra.c
src/panfrost/midgard/midgard_schedule.c