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(parent: 0fdb437) | patch
Change the generation of the vmuluwm instruction to be based on the MUL opcode.
authorKit Barton <kbarton@ca.ibm.com>
Tue, 10 Mar 2015 19:49:38 +0000 (19:49 +0000)
committerKit Barton <kbarton@ca.ibm.com>
Tue, 10 Mar 2015 19:49:38 +0000 (19:49 +0000)
commit20d3981e15b283eb008f605a5d93521ee8b5598a
tree444d02c94608d4546ff8678e05d92912f94425cftree | snapshot
parent0fdb437b251d5aa485baaf79a9f04225d32190d1commit | diff
Change the generation of the vmuluwm instruction to be based on the MUL opcode.

Phabricator review: http://reviews.llvm.org/D8185

llvm-svn: 231827
llvm/include/llvm/IR/IntrinsicsPowerPC.td diff | blob | history
llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff | blob | history
llvm/lib/Target/PowerPC/PPCInstrAltivec.td diff | blob | history
llvm/test/CodeGen/PowerPC/vec_mul.ll diff | blob | history
llvm/test/CodeGen/PowerPC/vec_mul_even_odd.ll diff | blob | history
Domain: System / Toolchain;