PCI: tegra: Refactor configuration space mapping code
authorVidya Sagar <vidyas@nvidia.com>
Wed, 20 Dec 2017 20:36:07 +0000 (21:36 +0100)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Thu, 21 Dec 2017 09:50:41 +0000 (09:50 +0000)
commit1fd92928bab518e762c81ce0d1427ce6ddd3ab22
tree2e56899c6c40576169e083fc1996276701e87276
parent1291a0d5049dbc06baaaf66a9ff3f53db493b19b
PCI: tegra: Refactor configuration space mapping code

Use only 4 KiB space from the available 1 GiB PCIe aperture to access
endpoint configuration space by dynamically moving the AFI_FPCI_BAR base
address. This frees more space for mapping endpoint device BARs on some
Tegra platforms.

The ->add_bus() and ->remove_bus() callbacks are now no longer needed,
so they can be removed.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
[treding@nvidia.com: various cleanups, update commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
drivers/pci/host/pci-tegra.c