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(parent: 41dc0b5) | patch
parisc: Don't enforce DMA completion order in cache flushes
authorJohn David Anglin <dave.anglin@bell.net>
Wed, 30 Mar 2022 14:42:30 +0000 (14:42 +0000)
committerHelge Deller <deller@gmx.de>
Mon, 23 May 2022 11:44:24 +0000 (13:44 +0200)
commit1fc7db2401d62df5a0b19250ddf3bb89d430dd86
tree821739050a04c307d8e6fcba3dda433be2fff7d5tree | snapshot
parent41dc0b53bcb1be3840bd616aea67f5b73400c169commit | diff
parisc: Don't enforce DMA completion order in cache flushes

The only place we need to ensure all outstanding cache coherence
operations are complete is in invalidate_kernel_vmap_range. All
parisc drivers synchronize DMA operations internally and do not
call invalidate_kernel_vmap_range. We only need this for non-coherent
I/O operations.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
arch/parisc/include/asm/cache.h diff | blob | history
arch/parisc/kernel/cache.c diff | blob | history
arch/parisc/kernel/pacache.S diff | blob | history
Domain: System / Kernel;