arm64: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E
authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Thu, 22 Apr 2021 17:31:49 +0000 (02:31 +0900)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 14 May 2021 07:50:43 +0000 (09:50 +0200)
commit1fc61844b6a2011627cfa58a82c6f5fed208b084
treeb446cd287e07dc443c3c75c9c9d15e881b2a5a08
parent0ae610556f238df7a36e4ffb0066ef0b6c71aecc
arm64: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E

[ Upstream commit dcabb06bf127b3e0d3fbc94a2b65dd56c2725851 ]

UniPhier LD20 and PXs3 boards have RTL8211E ethernet phy, and the phy have
the RX/TX delays of RGMII interface using pull-ups on the RXDLY and TXDLY
pins.

After the commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx
delay config"), the delays are working correctly, however, "rgmii" means
no delay and the phy doesn't work. So need to set the phy-mode to
"rgmii-id" to show that RX/TX delays are enabled.

Fixes: c73730ee4c9a ("arm64: dts: uniphier: add AVE ethernet node")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi