drm: rcar-du: Fix display timing controller parameter
authorKoji Matsuoka <koji.matsuoka.xm@renesas.com>
Mon, 18 Apr 2016 07:31:30 +0000 (16:31 +0900)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 30 Aug 2017 08:21:48 +0000 (10:21 +0200)
commit1fb8ff8b92bd1335e036e3187797136348fe0029
tree1cd88a47a4b092553c0a319009bfde2a9cfe26af
parent35fd2b840b6c02da9c0e8a31f52ebb89f51692e2
drm: rcar-du: Fix display timing controller parameter

commit 9cdced8a39c04cf798ddb2a27cb5952f7d39f633 upstream.

There is a bug in the setting of the DES (Display Enable Signal)
register. This current setting occurs 1 dot left shift. The DES
register should be set minus one value about the specifying value
with H/W specification. This patch corrects it.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Thong Ho <thong.ho.px@rvc.renesas.com>
Signed-off-by: Nhan Nguyen <nhan.nguyen.yb@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/rcar-du/rcar_du_crtc.c