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(parent: f2906aa) | patch
clk: renesas: r9a07g044: Add GPT clock and reset entry
authorBiju Das <biju.das.jz@bp.renesas.com>
Tue, 10 May 2022 11:06:52 +0000 (12:06 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 6 Jun 2022 09:13:30 +0000 (11:13 +0200)
commit1fb7a9fb6295220eb96c490581316b35fce180fe
tree8f23234e33f9455d89c24788e434002f27a41ce6tree | snapshot
parentf2906aa863381afb0015a9eb7fefad885d4e5a56commit | diff
clk: renesas: r9a07g044: Add GPT clock and reset entry

Add GPT clock and reset entry to CPG driver.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220510110653.7326-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a07g044-cpg.c diff | blob | history
Domain: System / Kernel;