drm/i915/gen8: Flip the 48b switch
authorMichel Thierry <michel.thierry@intel.com>
Wed, 30 Sep 2015 14:36:19 +0000 (15:36 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 19 Oct 2015 09:43:48 +0000 (11:43 +0200)
commit1f9a99e0e75f29776d6f4062a03edc5e41c60596
tree673f46ef3eb076a239ec306e4b3e37e03d445c30
parent6173ee2886ca46e00ba3d8f0b4a9a1cd6f8a76ce
drm/i915/gen8: Flip the 48b switch

Use 48b addresses if hw supports it (i915.enable_ppgtt=3).
Update the sanitize_enable_ppgtt for 48 bit PPGTT mode.

Note, aliasing PPGTT remains 32b only.

v2: s/full_64b/full_48b/. (Akash)
v3: Add sanitize_enable_ppgtt changes until here. (Akash)
v4: Update param description (Chris)

Cc: Akash Goel <akash.goel@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_gem_gtt.c
drivers/gpu/drm/i915/i915_params.c