[mips] Use MTHC1 when it is available (MIPS32r2 and later) for both FP32 and FP64
authorDaniel Sanders <daniel.sanders@imgtec.com>
Thu, 12 Jun 2014 11:55:58 +0000 (11:55 +0000)
committerDaniel Sanders <daniel.sanders@imgtec.com>
Thu, 12 Jun 2014 11:55:58 +0000 (11:55 +0000)
commit1f6f0f4b54c4fcb1b0e224434f066f2e62def8e9
treeab762aada13fec86ef3f01584158d9bb09d6c04d
parent28a0ca0759071a0e4e5ebac8bbcde0f765bd2957
[mips] Use MTHC1 when it is available (MIPS32r2 and later) for both FP32 and FP64

Summary:
To make this work for both AFGR64 and FGR64 register sets, I've had to make the
instruction definition consistent with the white lie (that it reads the lower
32-bits of the register) when they are generated by expandBuildPairF64().

Corrected the definition of hasMips32r2() and hasMips64r2() to include
MIPS32r6 and MIPS64r6.

Depends on D3956

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3957

llvm-svn: 210771
llvm/lib/Target/Mips/MipsInstrFPU.td
llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
llvm/lib/Target/Mips/MipsSubtarget.h
llvm/test/CodeGen/Mips/2013-11-18-fp64-const0.ll
llvm/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll
llvm/test/CodeGen/Mips/buildpairextractelementf64.ll
llvm/test/CodeGen/Mips/fcopysign.ll
llvm/test/CodeGen/Mips/fmadd1.ll
llvm/test/CodeGen/Mips/mno-ldc1-sdc1.ll