drm/i915: enable trickle feed on Haswell
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Fri, 23 Aug 2013 22:51:28 +0000 (19:51 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 3 Sep 2013 17:17:57 +0000 (19:17 +0200)
commit1f5d76dbb636c73912c9ff1c90ff46dd2273f098
tree416dd27dc8244bc2131f021586d7e824e5dee990
parent814c5f1f52a4beb3710317022acd6ad34fc0b6b9
drm/i915: enable trickle feed on Haswell

We shouldn't disable the trickle feed bits on Haswell. Our
documentation explicitly says the trickle feed bits of PRI_CTL and
CUR_CTL should not be programmed to 1, and the hardware engineer also
asked us to not program the SPR_CTL field to 1. Leaving the bits as 1
could cause underflows.

Reported-by: Arthur Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_pm.c
drivers/gpu/drm/i915/intel_sprite.c